One or more aspects of the invention relate generally to aligning a test probe card with devices under test.
Today, integrated circuits (ICs) are typically manufactured many at a time in the form of dies on or in a semiconductor material wafer. Often the manufacturing of the semiconductor wafer is diced, so as to obtain a plurality of IC chips. Before being packaged and shipped to a customer, and before being installed in various electronic systems, the ICs are tested for assessing their functionality, and in particular for ensuring that they are not defective. Typically, the dies are tested before the semiconductor wafer is diced into the individual chips.
Today's state-of-the-art test systems provide a planar wafer chuck and a test probe head as precisely as possible aligned in parallel to the wafer chuck. The test probe head is equipped with hundreds of thousands of pins in order to establish a contact to a device of a wafer to be tested. However, recent technology steps require tighter tolerances and are leading to more precise alignment requirements. Often, manual alignment steps are required in order to establish all electrical contacts between a test probe head and the device under test. For the test procedure, it is mandatory that all electrical contacts are established. One way to ensure a good contact may be to apply a defined force between a test pin and a test pad of the device under test. For short periods of time an electrical current of several amperes may flow through the pin/pad connection several times. The mentioned manual steps may be time-consuming and require special expertise of personnel.